Why did people stop trying to do this shit just when doing it well became viable

@a_breakin_glass I mean judging by how convoluted task state registers are in i386 I'm sure Intel turned it into a nightmare


@enkiv2 @a_breakin_glass i think the phrase "bit aligned instructions, from 6 to 321 bits in length" tells us all we need to know about the eldritch horror involved ;-)

@enkiv2 @a_breakin_glass

oh god. i just downloaded the manual... it's *exactly* that bad :-(

on the other hand, i'd love to play with a Symbolics 3600 on a single chip...

@thamesynne @enkiv2 @a_breakin_glass Certainly not much worse than "byte aligned instructions from 1 to 17 bytes in length" (8 to 136 bits) as contemporary x86 CPUs have. 😉

@thamesynne @enkiv2 @a_breakin_glass Still, I can't even begin to fathom what a 321 bit long instruction could possibly do. IA-64 had very long instructions, but even those instruction packets were broken up into 3 (or was it 4? Can't recall) smaller sub-instructions.

@vertigo @enkiv2 @a_breakin_glass

*takes a deep breath*

a 3 operand instruction (6 bit class, 4 bit opcode) where each operand is a dynamic array element (the longest memory reference), containing two indirect references (up to 28 bits max) and an indirect access selector (22 bits max) plus the control bits for the operand itself (4 bits) - so 82 bits * 3 + 10 = 256 bits... plus 4 format bits

that's 260... i *think*. it's confusing, though, and i might have missed some.

321 was suggested by the Great Microprocessors List; i'd never thought to check it before... but yeah, somewhere i'm 61 bits short

still, though. a 32.5 byte instruction... dear god!

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